Bookcover of Design and Analysis of 2:1 Multiplexer Circuit and its Applications
Booktitle:

Design and Analysis of 2:1 Multiplexer Circuit and its Applications

A Design Perspective

LAP LAMBERT Academic Publishing (2013-11-03 )

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ISBN-13:

978-3-659-22694-6

ISBN-10:
3659226947
EAN:
9783659226946
Book language:
English
Blurb/Shorttext:
Multiplexers, adders and multipliers are the most fundamental arithmetic component of the processor. These three have a direct impact on power consumption and speed of VLSI systems. Therefore study on low-power and high speed multiplexers, adders and multipliers is inevitable. Two important attributes of all digital circuits, for most applications are maximizing speed and minimizing power consumption. In this write up, i delve into various techniques for designing of 2:1 Multiplexer. The proposed design shows remarkably reduced power consumption and improved temperature sustainability when compared with the existing 2:1 multiplexer. The application of proposed 2:1 multiplexer circuit is shown in one-bit full adder cell and 2x2 array multiplier circuit, which also shows less power consumption and improved temperature sustainability over a range of parameters when compared with the existing one-bit full adder cell and existing 2x2 array multiplier.
Publishing house:
LAP LAMBERT Academic Publishing
Website:
http://www.lap-publishing.com/
By (author) :
Ila Gupta
Number of pages:
100
Published on:
2013-11-03
Stock:
Available
Category:
Electronics, electro-technology, communications technology
Price:
4318.40 руб
Keywords:
Low Power, Array Multiplier, CMOS Logic, 2:1 multiplexer, 1 bit full adder and VLSI, speed, power consumption

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